Voltage Conversion

This letter is a follow-up to my previous newsletter Vol. 8  Issue 06 "Law of Product Development", in which Mehran Abbasi writes: [edited]

I am trying to connect a source at 5V to a load at 3.3V using a 50-ohm transmission line. What kind of termination can I use which does this attenuation?

My initial response to his inquiry was this:

Achieving both attenuation and termination requires two resistors. At the source end of your connection, install a series resistor of approximately 22 ohms (Figure 1). At the destination end, install a shunt termination resistance of 50 ohms. These two components, in conjunction with the transmission line, form a perfect attenuator with a ratio of 50/(50+22). Adjust the 22-ohm resistor to account for the series resistance of your driver, in order to perfect the received signal size.

In reaction to that response, my good friend James Buchanan, author of "Signal and Power Integrity in Digital Systems", McGraw-Hill, 1995, and a highly experienced engineer at Northrop Grumman, writes to suggest that the solution I proposed to Mehran in "Law of Product Development" could be impossible! Here are his comments.

I have some remarks with regards to your article below which might have some bearing on the reason Mehran kept asking more questions (and did not seem to want to accept your answers). First, I assume he was talking about going from a 5V logic device to a 3.3V logic device. If that is the case, the problem with your suggested simple 22 and 50 ohm divider is that there are few logic devices (I know of only one) with enough drive strength to drive that low of an impedance to the proper 3.3V logic level.

The only part I know of that will drive 50 ohms to ground is the old 74S140 and it is only specified for a minimum high level of 2V when doing so. Assuming you set R1 to zero for use with this part that still leaves you with zero noise margin. The maximum specified high drive current for any modern device (that I know of) is 24 ma (74AC240s for example) which only gets you to 1.2V (50 ohms X 24ma = 1.2V) which is well below the standard 2V minimum required for a good high level. I suppose you could parallel CMOS outputs to get more drive.

The second possible problem with such a circuit, again assuming we are talking about going from a 5V logic device to a 3.3V logic device, is a power sequencing issue. Suppose the 5V power comes up first, while the 3.3V power is still at zero volts. Further suppose that the 5V driver is stuck HIGH while this happens. The 5V driver in that case may overdrive the 3.3V receiver if the 3.3V receiver has an ESD diode to Vcc (3.3V) which most (at least many) CMOS logic parts have. The 22-ohm series resistor you suggest is typically not large enough to limit the current in this case to a safe level. Many logic parts have an absolute maximum input current limit of only 20 ma (some are even lower). Enough series resistance must be included to prevent dangerous overdrive currents when powering up.

The third problem is that the current drawn from the 5V part under this particular power sequencing scenario may burn out the 5V driver. The burn-out problem is subtle. Most modern logic parts have an absolute maximum rating for dc output current of 50 ma (see for example the 74AC240 data sheet). That limit can be exceeded if the part sources enough current to drive a 50 load to 2.5 volts (which is a normal TTL logic high level requirement with noise margin). The problem here is that if a weak part is guaranteed to just makes 2.5 volts, a strong part will be much above 2.5 volts when driving high, so the current will exceed the 50 ma absolute maximum rating.

To prevent this from happening, my company has developed derating rules that prevent anyone from designing all the way up against the data sheet limits. Depending on the application (space, airborne, etc.,) we limit our use to 50, 80, or some other appropriate percentage of the absolute worst case specifications.

As part of my job here at Northrop I think about these issues a lot. I keep a list of the most common digital design problems I see each year, and constantly remind our designers about these common problems. Every year I find myself repeating the same lecture about unexpected currents traversing ESD diodes. Power sequencing problems are some of the most perplexing design problems we encounter.

Just last week I was called in to help fix two cases where parts were being "burned out" because of power sequencing problems and one more case the week before. I see a great number of these problems each year.

Power sequencing is becoming more and more of an issue as we proliferate so many different power supply levels.

Wow! Thanks for your thoughtful analysis. Your points are well taken, especially about the power sequencing mess. Do you think it would help Mehran's problem if the 5V device is guaranteed to come up in a LOW state, and remain so until power has stabilized?

Our policy at Northrop is that all circuits must be designed to tolerate any power sequence. We do not believe it is practical to always control the sequence, or to control the state in which gates power up.

I find that when we make assumptions about the power sequence, or the initial logic state, someone inevitable violates those assumptions either during test or during design verification.

When we are doing power voltage translation we try to use parts that do not have ESD diodes to Vcc on such interfaces, and can tolerate large input voltages without latching up. For example, LVT 3.3V parts do not have ESD diodes to Vcc and make good 5V to 3.3V translators. These parts impose no power sequencing requirements.

OK, so now I'm really motivated to come up with a better solution. I'm going to try a slew of different architectures to see what is good and bad about each one. Let's begin by calculating the current required to make the original solution (Figure 1) operate. In order to get 3.3 volts across the 50-ohm load, we need to pump a current of 3.3/50=66 mA through it. Somehow this current has to come out of the driver. Yikes!

What happens if we tweak the resistor values? To meet our attenuation goal the resistor ratio R1:R2 must be about 1:2, meaning R1 is half of R2. Actually, what you want is for the total series impedance formed by R1 plus the natural series impedance RS of the driver, to equal half of R2.

My first attempted solution picked R2=50 in order to end-terminate the 50-ohm transmission line, but I could also have picked an alternate set of values such that we obtain a series terminated configuration, instead of an end-terminated one.

Figure 2 places a resistor R1 in series with the driver, with the value of R1 selected such that the effective series impedance RS of the driver, plus R1, together equals about 50 ohms. This makes a good series termination. Now at the end of the line the end-termination can be twice that, or 100 ohms. Voila! We just sliced the drive current requirement in half to only 33 mA.

Let's go further. If I change the transmission line impedance to 75 ohms we get to increase all the resistor values (and decrease the current) by a factor of 1.5, yielding 22 mA, a very achievable number, but that would be cheating because Mehran says he has a 50-ohm transmission line, not a 75-ohm line. One thing I've learned about problems like this is that when I suggest changing the transmission line impedance I usually discover the layout is "already done" and "cannot be changed". SO... let's try something else.

How about the circuit in Figure 3? This places a split end termination at the endpoint (412 ohms to 3.3 Volts and 137 ohms to ground), and sizes the series resistance at the driver such that the effective output resistance of driver plus R1 equals 65 ohms. The source impedance of 65 ohms is not a perfect match to a 50-ohm line, but since it is at least in the right ballpark it generates a reflection coefficient of only (65-50)/(65+50)=0.130.  At the endpoint the effective parallel impedance of the resistors is 103 ohms, yielding a reflection coefficient of 0.345, for a grand total roundtrip reflection coefficient of (0.130)(0.345)=less than five percent. Not too shabby. Provided the driver puts out at least 24 mA in both directions, the circuit meets both V[OH] and V[OL] logic levels at the 3.3-volt input. Plus, there's enough attenuation that we may not have to worry about overdriving anything.

What I don't like about Figure 3 is that it takes three parts.

The series-terminated circuit in Figure 4 places all the attenuation at the source end of the line. It has the lowest DC current drive requirement of 3.3V/(75+150) = 14.7 mA. The problem with this circuit, and it may not be a problem depending on the application and the settling time permitted, is that the initial SURGE current required to drive the structure from low to high is 44 mA. The surge happens because, during the first roundtrip delay, the transmission line looks like 50 ohms to ground, so the driver has to drive 75 ohms in series with the parallel combination of 150 and 50 ohms. The parallel combination of 150 and 50 equals 37.5 ohms, plus 75 makes 112.5, which when driven to 5 volts requires 5/112.5=44mA. This surge persists for only one roundtrip time and then rapidly decays. The signal at the end will not achieve V[OH] on the first edge, but will do so soon afterwards.

Figure 5 abandons the totem-pole driver structure entirely. This structure uses an open-collector (pull-down only) type of TTL driver directly coupled to the 50-ohm line, terminated at the end with 50 ohms to 3.3 volts.  The 74F757D, which can sink 64 mA to 0.55 volts, will do this job, meeting all the problem requirements, but dissipating a huge wad of power when pulling low. If you choose this approach, I hope the signal stays high most of the time and only occasionally needs to pull low.

If the layout is not "already done" I would consider specifying a higher impedance transmission line and raising R2 to reduce the driver current. If I could afford a couple of roundtrip times of delay I might raise R2 even further.

So, which is best? After considering all the factors, if I had my choice about it, I would specify a receiver with 5-volt tolerant inputs at the 3.3-volt side. If I make the line sufficiently short, it might not need termination. If the line is longer, then considering the power issue paramount, and assuming the signal quality were acceptable, I would prefer a simple, series-terminated driver.

Best regards,
Dr. Howard Johnson