Via Inductance II


Let me tell you about what's happening with my new Advanced High-Speed Signal Propagation class. After piloting the course at Oxford University last May, I have spent the summer refining the material in preparation for the U.S. premier in San Jose on October 27-28.

As you probably know, I love doing live experiments during my seminars. This feature remains one of the more popular parts of the classroom experience. I like to show how things really work.

Unfortunately, a classroom setting limits the length and complexity of the experiments I can do. To break free of that limitation I've begun filming new versions of the experimental demonstrations that I conduct in my High-Speed Digital Design class, as well as all-new experiments for the Advanced class. The first of these videos will be shown during the October classes, in lieu of live demonstrations.

The filmed versions eliminate wasted movement between measurement setups, allowing me to pack more measurements into the same amount of time. The films proceed much like a TV cooking show-first I explain what I'm going to do, show the ingredients, and then we cut directly to the finished pudding. Spectacular video close-ups give the audience a much better viewing perspective that is possible in a live format. A professional movie crew, with full lights and sound, did the filming and editing.

Initially, the videos will be shown only during my classes. I look forward to receiving feedback from those of you who have the opportunity to view them.

The following question is directly related to one of my video experiments AND to the material covered in the Advanced class.

Via Inductance II

The following values for the inductance of an interplane via were collected using the incremental inductance technique described in chapter 5 ofHigh-Speed Signal Propagation: More Black Magic , and discussed in detail during my video "Inductance of Via", which will be shown as part of my new Advanced class. I hope you find the numbers

The setup is shown in , Fig. 5.33, p. 353, of High- Speed Signal Propagation (if you don't have the book, the figure also appears in newsletter Vol. 6 Issue 04, "Via Inductance"). The setup provides for four layers (signal, plane, plane, signal). The trace proceeds from layer 1, down through a signal via to layer 4, and then continues across the board. The planes are connected by a single interplane via, located some distance away from the signal via.

The physical setup in this experiment was constructed at a model scale 100:1 times bigger than real life, making it easy to fabricate and also easy to accurately measure. The planes are fabricated from (non-magnetic) stainless steel, separated by about 4 inches (corresponding to a real-life separation of 0.040 in.). The planes are suspended in air. The horizontal extent of the planes is 48x24 in. This arrangement makes the setup big enough so a camera can actually look inside the planes while the measurements are taking place.

The interplane connection is designed to be movable, so you can see the impact of its placement on the performance of the via. I can actually put my hand on the interplane connection and drag it back and forth while watching the TDR response getting better and worse--a fantastic way to optimize via geometry.

The purpose of making these measurements was to corroborate real-world measurements of via inductance with a simple approximation:


  • LVIA is the inductance, in H, taking into account only that portion of the via inductance due to the traversal of the interplane space interior to the pcb,
  • ln() is the natural logarithm,
  • h is the interplane spacing (height),
  • s is the separation between the signal via and one interplane connection, and
  • r is the radius of the via.

In metric mks units (h, s, and r in meters, L in Henries), the constant μ/2π works out to2·10-7 H/m (assuming a non-magnetic dielectric).

In English units, (h, s, and r in inches, L in nH) the constant μ/2π equals 5.08 nH/in.

The dimensions of the real-world via under study are:

Via diameter 0.010
Via radius 0.005
Interplane separation 0.040
Conductor thickness (all) 0.0062 (~ 1/2 oz. Cu)
Clearance hole diameter 0.024
Pad diameter on signal layer
(pads stripped on plane layers)
Trace width 0.0075
Trace height 0.004
Trace length (on either side of via) 0.240
Dimension of planes (plan view) 0.480 x 0.240

The following results were obtained for the incremental inductance of the via. The data were taken using an HP 4271B digital four-terminal LCR meter operating at a frequency of 1 MHz. The results are listed as a function of the spacing s between the signal via and the interplane connection (measured center-to-center). The units for s are inches, the inductances are listed in nH, and the capacitances are in pF. All values listed here are corrected for the model scale and assume the real via is surrounded by FR-4 having an effective dielectric constant of 4.1 at 1 GHz.

0.017 0.49 0.46 0.40
0.02 0.56 0.54 0.38
0.03 0.73 0.76 0.37
0.06 1.00 1.07 0.37
0.09 1.17 1.25 0.37
0.12 1.29 1.41 0.37

Two known factors account for the deviation between predicted and measured results.

First, the effective size of the planes in this experiment, when scaled to account for the 100:1 model scale, equate to a section of pcb measuring only 0.480 x 0.240 in.

This dimension is only a few times larger than the interplane spacing of 0.040 in., a situation that is known to affect (slightly) the measured results. The effect of limited plane area becomes more pronounced as the interplane connection is moved further from the signal via.

Second, the simple approximation takes into account only that portion of the via inductance due to the traversal of the interplane space interior to the pcb, ignoring the inductance of the via stubs protruding above and below the planes. The via stubs in this case are much shorter than the interplane spacing. Additional errors result from mechanical imprecision of the model, and noise and parasitic effects in the measurement apparatus.

The definition of LVIA is used in determining the reflection coefficient of a via (High-Speed Signal Propagation, chapter 5), and also appears as the term L2 in the overall inductance of a bypass capacitor (see "Parasitic Inductance of Bypass Capacitors", EDN July 20, 2000).

Via inductance, via capacitance, trace loss, S- parameters, and a wealth of other topics related to high-speed digital operation above 1 GHz are all included in my all-new class, Advanced High-Speed Signal

Propagation. See the syllabus.

Extra for Experts

The stainless steel (type 304, non-magnetic) used in the model has a resistivity 40 times higher than copper. This feature enlarges the depth of penetration of current (skin depth) in the model, so that the ratio of skin depth to conductor thickness in my giant 100:1 model, when measured at 1 MHz, is comparable to a copper via, at a scale 100 times smaller, operated at a frequency of 250 MHz.

The trace geometry was designed so that, if the model were stuffed with an FR-4 dielectric, the model trace characteristic impedance would be 50 ohms. So that I could get my hands on the model to actually move the interplance via to different positions between the planes, the dielectric I used in the model was nothing but thin air (mostly). To hold the model trace in position, and to separate the planes, I used small wooden dielectric supports. These supports are clearly visible in the video. The use of an air dielectric, while it affects the capacitance of the via, has no effect on its inductance. The characteristic impedance of the air-dielectric trace in the model works out to about 85 ohms.

Best Regards,
Dr. Howard Johnson