Logic Analyzer Test Points

I recently attended your High Speed Digital Design Class, and the class was great! I had learned from other people some things to avoid or guidelines to follow, but it certainly helps to understand the "why" behind it all. There's definitely a lot to think about now. Thanks for sharing your knowledge and experience with us.

I have a question regarding test points on an engineering board. I realize that test headers are not ideal to have on a high speed board, but if we need to connect to a logic analyzer I don't see another alternative. Headers also make it convenient when you are probing multiple signals on an oscilloscope at the same time.

I am currently working on a mixed signal board with analog signals up to 150 MHz and digital signals up to 300 MHz. My question is where do I draw the line (what speed?) between signals that I can safely use headers on and which require via test points. Is there a specific type of header you can recommend which is less harmful to signal integrity than others? I have seen solid metal test headers and then there are the standard headers with a black plastic base.

Also, when I use these headers or via test points, is it better to place them in the path of the trace or place a very small stub going to the header/test point? When inserting via test points, should I also compensate for the via inductance by changing the trace width of the signal?

This is the first engineering board I have worked on, and it is difficult to find the median at which I will retain signal quality and still have the means to perform extensive testing. I would appreciate any advice you have on this topic.


Thanks for your interest in High-Speed Digital Design.

What's the input impedance of the logic analyzer probe lead? That makes a good deal of difference. For a 50-ohm probe head (ribbon coax going straight back to a set of 50-ohm inputs on the analyzer) I'd place 1-K resistors on the PCB, one touching each signal line. The resistors will attenuate the signal (which is bad), but present a high-impedance load to your delicate high-speed signals (that's good). I'd then run the attenuated signals from that point over to the header, and on to the analyzer. In effect, what you've done is build part of the probe right onto the board.

If it's a high-impedance probe head, it already has a lot of attenuation so you won't want to add any more. Your biggest consideration then will be minimizing the total capacitance of the header pin and any trace that connects the header pin to the signal under test.

About modulating the trace widths, I wouldn't recommend messing around with this unless you are prepared to do a *lot* of detailed simulation work. It can help, but it can also go terribly wrong if you aren't careful. The only general guideline I can supply about trace widths is this: if you use tap traces on the bus, squeeze them down to the narrowest, lowest capacitance configuration possible.

Best Regards,
Dr. Howard Johnson