PCI Series Termination Resistors

Your class in Atlanta was terrific, but some of us left a little confused about using series termination resistors on the PCI bus. What am I to do with bi-directional lines on this bus? Since the output and input buffers are tied together internally on our FPGA, there's no way to add a series termination resistor to just the output buffer. Yours has been the clearest explanation that I have seen on reflected-wave switching, but I would appreciate it if you could just clear up this point.

Thank you.

Hi Brian,

Thanks for your interest in High-Speed Digital Design.

Regarding your question below: It's OK to use series termination resistors with bi-directional transceivers.

Here's the concept we presented in class:

---long line--------------[SERIES R]---[I/O buffer]

When transmitting from the [I/O buffer] (signal going to the left) the [SERIES R] acts as a source termination resistor.

When receiving (signal going to the right) the [SERIES R] is in series with the [I/O buffer].

The [SERIES R] has an effect on the received signal. If the [I/O buffer] inputs have a **higher** impedance than the line impedance (this is the normal case) then the [SERIES R] effect will be small.

The effect of the [SERIES R] is this: It will delay the incoming signals, and degrade their risetimes.

You can calculate the magnitude of these effect. You will need to know the input capacitance CL of the [I/O buffer] when it is in the tri-state, or OFF, condition.


As a received signal passes through the [SERIES R] on its way to the [I/O buffer] the signal will experience a delay in time equal to [SERIES R]*CL.

Risetime degradation

Assuming the received signal has a risetime T1, the signal seen by the [I/O buffer] will have a new risetime equal to:

SQRT[ (T1)^^2 + (2.2*[SERIES R]*CL)^^2 ]

If your receiving and transmitting components are split, so that you can connect the receiver on the **left** side of the drawing above, then the receiver will avoid the extra delay and risetime degradation introduced by the R-C effect of the series terminator.

The same principles apply to the use of series terminations on the PCI bus.

I hope these comments are helpful to you.

Best regards,
Dr. Howard Johnson