I have a question regarding current flowing on the closest plane under a traveling wave front. The [seminar] material and book, (and our best recollection) says that the return current as the wave front passes down the trace, passes through the parasitic capacitance to the plane directly below the trace. It then goes back to the driver, flowing directly (within s distribution curve) under the driving trace (if not interrupted).
Your book says "Path of least inductance", which seems to indicate that the plane directly under the trace has lowered impedance than plane in any other direction.
Why is this? Magnetic mutual inductance? Parasitic capacitance with the trace?
Thanks for your interest in high-speed digital design.
I always appreciate a good fundamental question like yours. Let's investigate this question with a thought experiment.
Suppose I create a system with three wires.
The first wire carries a signal from my pulse generator to a load at the far end.
The second wire carries return current from the load back to the ground connection of the pulse generator.
The third wire also carries return current from the load back to the ground connection of the pulse generator, but through a different path (see stick figure below).
SIG------------wire 1--------------+ | LOAD | GND+-----------wire 2--------------+ | | GND------------wire 3--------------+
On which wire will most of the current flow? At DC, if the resistances of the wires are equal, half the return current will flow on each wire (that's the least-overall-resistance path). This result may be found mathematically by using Kirchoff's laws, or you may intuit the result from the idea that the two wires are resistively equal, so the current should divide evenly.
At high frequencies, something entirely different happens.
Current in general follows the path of least overall impedance, and at high frequencies it is the inductance of the pathways, not the resistance, that dominates the impedance. Let us then consider the inductance of two possible current pathways:
- PATH A: SIG-wire1-load-wire2-GND
- PATH B: SIG-wire1-load-wire3-GND
The loop formed by path B is larger than the loop formed by path A, therefore the inductance of loop B is larger than the inductance of loop A, therefore MOST of the current flows on loop A. In general, if you provide two high-speed pathways, the returning signal current will take the path that minimizes the total exposed loop area between the outbound and return paths.
I should point out that the complete solution of the inductance problem involves not only the individual inductances of the two pathways, but also the mutual inductance between the two paths. Just looking at the loop size gets you started thinking in the correct direction, but a full understanding of the problem may be attained only when you write out the complete solution. Let's do that.
I'll do the solution in "per-inch" units, so we don't have to carry the "wire length" term around everywhere inside the equations.
I'll assume the wires are equally spaced, one inch apart.
The self-inductance of a pair of long, parallel wires, per inch, is:
- U0 is the magnetic permeability of free space, 3.192E-08 Wb/A-inch,
- pi is the constant 3.1415926...,
- y is the separation between the wires, and
- r is the wire radius (assume 0.01").
With these dimensions we get the following values for the inductance of pathways A and B:
As you can see, the inductances of the paths A and B are different, but not that much different. Reasoning only from the values of total inductance we would predict that the current in path B would be 87% of the current in path A. That's not the whole story, as we shall see.
Next let's calculate the mutual inductance between path A and path B. The way we do that is to force a current of 1 amp around path B, and calculate the total magnetic flux passing through loop A. The answer may be intuited by noticing the symmetry of the situation. When the force current around path B we know to total inductance of path B is 53.8 nH. The loop formed by path A intercepts precisely half the flux (because it's in the middle halfway between wire 1 and wire 3), so the mutual inductance between paths A and B is:
Next we put these values into Kirchoff's equations:
- Equation 1 is Kirchoff's voltage law applied around path A,
- Equation 2 is Kirchoff's voltage law applied around path B, where VSIG is the voltage from the pulse generator,
- IA is the current in path A, Where IB is the current in path B (the two paths overlap),
- ZLOAD is the impedance of the load, in ohms,
- S represents the Laplace transform differential operator d/dt,
- LA is the inductance of path A,
- LB is the inductance of path B, and
- LM is the mutual inductance between paths A and B.
Taking the difference between these two equations, and dividing out the superfluous "S" term:
The above calculation shows that the mutual inductance between the paths takes away some of the current from path B and places it into path A. The net remaining current in path B (wire 3) will be only 74% of the current in path A (wire 2).
If we extend this argument by implementing a plethora of possible pathways, the pathways nearest the outgoing signal wire take away more and more of the current from the more remote return conductors. In the limit, if I place a veritable carpet of return wires under the signal trace (simulating a solid plane) the current distribution in those wires will attain a distribution roughly proportional to 1/(1+(D/H)2). This is equation 5.2 from the text High-Speed Digital Design: A Handbook of Black Magic.
This equation may be derived numerically by setting up a huge matrix of mutual inductances representing the carpet of return wires, or mathematically using partial differential equations. The expression is exact for a thin, round wire. It is a very useful approximation for other situations.
Dr. Howard Johnson