I have read your article in Electronic Design regarding bypass caps in high-speed design. While most of what you have to say is very useful, I must take issue with your claim of having achieved a power-to-ground impedance of 0.01 ohms by paralleling one hundred 0.1uF caps, each having 1 ohm or less impedance at the frequencies of interest. What matters, I believe is the source impedance AT EACH COMPONENT, and this will be degraded significantly at high frequencies by the trace inductances of the printed circuit board. While each component will realize the benefit of its nearest .1uF cap, the net contribution of the others will depend on their distance from the component in question. That's why we spread 'em around instead of putting 'em all next to the battery.
Thanks for your interest in High-Speed Digital Design.
You've raised a good point. One of my working assumptions in that article on the layout of bypass capacitors, was that the individual capacitors of the array were spread around, and that solid power and ground planes were used, not traces. I guess that idea is so ingrained in my head that I don't talk about it very much.
Anyway, my approach is to maintain an appropriate balance between the *total* current drawn at any moment of time by all chips on the board, and the *total* parallel impedance of all the capacitors on the board. If you work the problem in units of current and impedance *per-chip*, you (hopefully) will conclude that the system acts as if you really had 0.01 ohms between power and ground.
By the way, in the range of 10 - 100 MHz (where for most boards the series inductance of the bypass capacitors is the dominating component of Vcc-Gnd impedance) the power system on a typical 6"x6" board with solid planes can be treated pretty much as a lumped-element circuit. If you check the impedance in this range with a network analyzer, you'll really see 0.01 ohms.
As you begin to exceed one hundred megahertz, you are right-- the position of the capacitors starts to matter a lot, and you don't get such a low impedance at any one point (although things still work out OK on a *per-chip* basis).
With a FR-4 dielectric, a 6"x6" board hits its first power plane resonance at about 500 MHz. That's the point at which the planes themselves begin to behave like a big, distributed 2-dimensional transmission line. Weird effects follow. Someday, we'll start using lower dielectric constants for our boards in order to raise the frequency of the power plane resonances.
Dr. Howard Johnson