I've been scrutinizing probe specifications for a 10-Gbps serial-link application and concluded that no probe, from any manufacturer, will do what I want. You could say I reached this conclusion because I want too much, but on the other hand, who doesn't? Here's my wish list.
The probe I want shows me exactly the signals I need to see without affecting signal quality. Whether or not the probe is touching my system, the signals work the same way.
My dream probe has a bandwidth matched to the bandwidth of my receiver. It views my signals through the same bandwidth lens as my data slicer. If the eye opening at the slicer is X, the probe should show me an eye with an opening of X, not more and not less.
A perfect probe picks up no extraneous noise. It shows only the noise actually present in the circuit—no other artifacts.
How do you achieve this incredible level of performance? It is not easy, but it is possible. What you must do is embed the probe inside your transceiver, on the die. This scenario requires thinking about the process of measurement (and the business of making test equipment) in a new and different way.
Currently, most digital engineers view their signals using a probe-and-box approach. The probes gather raw data from the system, and the boxes store, format, and display that data in a usable format. For high-speed serial links, you should change that model to a more chipcentric approach.
First, you should capture raw data right at the slicer inside your chip. This step requires one additional, adjustable slicer (a comparator), whose reference level you can program up and down at will, and a wandering clock phase that samples data from the adjustable slicer. These two elements together constitute a primitive sampling scope. The data that these circuits capture and the data from your normal data slicer are all you need to create meaningful eye-pattern displays, jitter histograms, and many other tools for serial-link analysis.
Next, you must pump the collected information out of your chip into an analysis box. Many alternative schemes can satisfy this need, depending on the speed at which data needs to transfer. Some designs may require specialized high-speed I/O pins, and others might make do with simpler, JTAG-like control structures.
Last, you must analyze the collected data. This step becomes entirely a matter of software. Present-day manufacturers of scopes and jitter-analysis equipment will eventually concede that the main value of high-speed-serial-link analysis lies not in their box, but in their ability to interpret and display the data that chip interfaces collect.
Is this scenario feasible? The answer is yes, because I have seen multiple system designs do it across a range of operating speeds (as fast as 10 Gbps). Compared with an automatically adaptive equalizer, the circuitry necessary to sample eye patterns is neither difficult to design nor wasteful of power or space. The technology works; what we face is a matter of making it commonplace.
If you work for a scope vendor, or even if you do not, take note: Future generations of high-speed-link designers will peruse catalogs of intellectual property for embedded sampling scopes, not physical boxes. They will choose among standard interfaces and protocols for pumping the collected data out of their chips and analyze that data using portable software tools. Future technology will analyze the eye pattern on every receiver, right at the die, on every link of a big system, in real time, while the system runs.